发明名称 |
Semiconductor memory device having a plurality of sense amplifier circuits |
摘要 |
A sense amplifier is constructed to reduce the occurrence of malfunctions in a memory read operation, and thus degraded chip yield, due to increased offset of the sense amplifier with further sealing down. The sense amplifier circuit is constructed with a plurality of pull-down circuits and a pull-up circuit, and a transistor in one of the plurality of pull-down circuits has a constant such as a channel length or a channel width larger than that of a transistor in another pull-down circuit. The pull-down circuit with a larger constant of a transistor is first activated, and then, the other pull-down circuit and the pull-up circuit are activated to perform the read operation. |
申请公布号 |
US8199596(B2) |
申请公布日期 |
2012.06.12 |
申请号 |
US20100939069 |
申请日期 |
2010.11.03 |
申请人 |
AKIYAMA SATORU;TAKEMURA RIICHIRO;KAWAHARA TAKAYUKI;SEKIGUCHI TOMONORI;HITACHI, LTD. |
发明人 |
AKIYAMA SATORU;TAKEMURA RIICHIRO;KAWAHARA TAKAYUKI;SEKIGUCHI TOMONORI |
分类号 |
G11C7/02;H01L21/8242;G11C7/06;G11C11/401;G11C11/409;G11C11/4091;H01L27/108 |
主分类号 |
G11C7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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