Multiple time programmable non-volatile memory element

摘要

A multiple time programmable non-volatile memory element and associated programming methods that allow for integration of non-volatile memory with other CMOS integrated circuitry utilizing standard CMOS processing. The multiple time programmable non-volatile memory element includes a capacitor, an access transistor that is electrically coupled to the capacitor at a connection node, and a plurality of one time programmable non-volatile memory cells. Each of the plurality of one time programmable non-volatile memory cells is electrically coupled to the connection node and includes a select transistor that is electrically coupled to an antifuse element. The antifuse element is configured to have changed resistivity in response to one or more voltage pulses received at the connection node, the change in resistivity representing a change in logic state.