摘要 |
A buffer control system for generating a buffered signal having reduced buffer delay time between playback of tracks includes a controller module for providing an end target and for selection of a servo data signal corresponding to a desired track; a compare circuit coupled to the servo data signal for comparing a timestamp of the servo data signal to the end target, and asserting an end match signal when the timestamp of the servo data signal matches the end target; and a data buffering unit for storing the servo data signal as stored data to fill a capacity of an internal memory, and streaming out the buffered signal from the stored data in the internal memory when the capacity has reached a predetermined level; wherein the controller module is for updating selection of the servo data signal according to a next desired track upon assertion of the end match signal. |