| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an encryption processing device which executes one rounding operation in one clock cycle and is capable of improving DPA resistance while suppressing the increase in circuit scale. <P>SOLUTION: The encryption processing device includes: a first register 105; a second register 106; a rounding operation unit 109 which has an Sbox as a nonlinear conversion part and performs a rounding operation on a value stored in the second register; a first operation unit 102 which operates EXOR between initially substituted first data and a prescribed disturbing value; a second operation unit 103 which operates EXOR between initially substituted second data and a prescribed disturbing value; an inverse substitution unit 107 which performs inverse substitution on a value stored in the first register; and a third operation unit 109 which operates EXOR between a value resulting from the inverse substitution and a prescribed disturbing value and supplies the operation result to the rounding operation unit. In the rounding operation unit 109, a value obtained by releasing a disturbed state of the value stored in the second register is inputted to perform nonlinear conversion processing in the Sbox, and a result from EXOR between the processing result of the Sbox and the operation result of the third operation unit is outputted to the second register. <P>COPYRIGHT: (C)2012,JPO&INPIT |
