发明名称 Multi-Bit Resistance-Switching Memory Cell
摘要 A non-volatile storage apparatus comprises a set of Y lines, a set of X lines and a plurality of memory cells in communication with the set of X lines and the set of Y lines. Each memory cell of the plurality of memory cells includes a resistance element in a static resistance condition and two or more reversible resistance-switching elements. The resistance element in the static resistance condition and the two or more reversible resistance-switching elements are connected to different Y lines of the set of Y lines. The resistance element in the low resistance state and the two or more reversible resistance-switching elements are connected to a common X line of the set of X lines. One or multiple bits of data are programmed into a particular memory cell of the plurality of memory cells by causing current flow between Y lines connected to the particular memory cell.
申请公布号 US2012140547(A1) 申请公布日期 2012.06.07
申请号 US201213396501 申请日期 2012.02.14
申请人 SCHEUERLEIN ROY E. 发明人 SCHEUERLEIN ROY E.
分类号 G11C11/00 主分类号 G11C11/00
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