发明名称 PHASE INTERPOLATOR AND SEMICONDUCTOR CIRCUIT DEVICE
摘要 A first mixer generates a first and a second clock signal having a phase opposite to that of the first clock signal. A second mixer generates a third clock signal having a phase lead angle of 90 degrees with respect to the first clock signal and a fourth clock signal having a phase opposite to that of the third clock signal. An ADC generates a digital signal from a signal that is generated on the basis of a composite signal of a voltage signal formed on the basis of the exclusive OR of the first and the third clock signal and a voltage signal formed on the basis of the exclusive OR of the second and the fourth clock signal. An adder adds the digital signal to the first control signal to generate the second control signal and supplies the second control signal to the second mixer.
申请公布号 US2012139591(A1) 申请公布日期 2012.06.07
申请号 US201213369847 申请日期 2012.02.09
申请人 OZEKI YOSHITOMO;FUJITSU LIMITED 发明人 OZEKI YOSHITOMO
分类号 H03L7/08;H03L7/00 主分类号 H03L7/08
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