发明名称 PHASE-LOCKED LOOP CONTROL VOLTAGE DETERMINATION
摘要 <p>A method and circuit is provided for determining a control voltage of a voltage controlled oscillator with fast frequency lock of a phase-locked loop and which is advantageous to the situation when an ultra-low frequency reference is used. The method and circuit determines a current error between a reference clock signal and a feedback clock signal, and checks if the error is larger than the threshold value which checks if an error sign indicator is set, i.e. the error has switched sign since startup of feedback loop; if the error sign indicator is not set, the circuit determines a divisor, kn, using the current error, en, current control voltage, un, previous error en-1, and previous control voltage, un-1; however, if the error sign indicator is set the circuit determines a divisor, kn, using stored values for the latest control voltage and error when the error was negative and stored values for the latest control voltage and error when the error was positive; furthermore, the method and circuit determines a control voltage step using the determined error divided by the divisor, kn, and determines a new control voltage using the current control voltage, un, and the determined control voltage step.</p>
申请公布号 WO2012071683(A1) 申请公布日期 2012.06.07
申请号 WO2010CN01934 申请日期 2010.12.01
申请人 TELEFONAKTIEBOLAGET L M ERICSSON (PUBL);WEN, GAN 发明人 WEN, GAN
分类号 H03L5/00;H03L7/08 主分类号 H03L5/00
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