发明名称 |
Method of Manufacturing a Wafer Assembly with Junction-Isolated Vias |
摘要 |
A process for forming a junction-isolated, electrically conductive via in a silicon substrate and a conductive apparatus to carry electrical signal from one side of a silicon wafer to the other side are provided. The conductive via is junction-isolated from the bulk of the silicon substrate by diffusing the via with a dopant that is different than the material of the silicon substrate. Several of the junction-isolated vias can be formed in a silicon substrate and the silicon wafer coupled to a second silicon substrate comprised of a device that requires electrical connection. This process for forming junction-isolated, conductive vias is simpler than methods of forming metallized vias, especially for electrical devices more tolerant of both resistance and capacitance. |
申请公布号 |
EP2426710(A3) |
申请公布日期 |
2012.06.06 |
申请号 |
EP20110190141 |
申请日期 |
2006.02.27 |
申请人 |
MEGGITT (SAN JUAN CAPISTRANO), INC. |
发明人 |
WILNER, LESLIE, B |
分类号 |
H01L21/768;H01L21/98;H01L23/48;H01L25/065 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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