发明名称 Voltage controlled oscillator with dither
摘要 A voltage control signal at a voltage control signal input terminal is used to adjust an output frequency of an oscillator circuit. The voltage level of the voltage control signal is converted in a one-bit analog-to-digital converter (ADC) to a digital output indicative of the voltage level. Successive digital representations of the voltage level of the voltage control signal are upsampled to generate upsampled blocks of data. A dither circuit inserts a digital dither in the upsampled blocks of data to generate dithered upsampled data, which is used to generate a control signal for a feedback divider of a phase-locked loop circuit and thereby adjust the output frequency.
申请公布号 US8193867(B2) 申请公布日期 2012.06.05
申请号 US20100916194 申请日期 2010.10.29
申请人 FU ZHUO;HARA SUSUMU;SILICON LABORATORIES INC. 发明人 FU ZHUO;HARA SUSUMU
分类号 H03L7/08;H03M3/02 主分类号 H03L7/08
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