发明名称 Hybrid transactions for low-overhead speculative parallelization
摘要 A method and apparatus for a hybrid transactional memory system is herein described. A first transaction is executed utilizing a first style of a transactional memory system and a second transaction is executed in parallel utilizing a second style of a transactional memory system. For example, a main thread is executed utilizing an update-in place Software Transactional Memory (STM) system while a parallel thread, such as a helper thread, is executed utilizing a write buffering STM. As a result, a main thread may directly update memory locations, while a helper thread's transactional writes are buffered to ensure they do not invalidate transactional reads of the main thread. Therefore, parallel execution of threads is achieved, while ensuring at least one thread, such as a main thread, does not degrade below an amount of execution cycles it would take to execute the main thread serially.
申请公布号 US8195898(B2) 申请公布日期 2012.06.05
申请号 US20070965120 申请日期 2007.12.27
申请人 WELC ADAM;ADL-TABATABAI ALI-REZA;INTEL CORPORATION 发明人 WELC ADAM;ADL-TABATABAI ALI-REZA
分类号 G06F13/14 主分类号 G06F13/14
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