发明名称 |
Semiconductor memory device having dummy cells in NAND strings applied with an additional program voltage after erasure and prior to data programming |
摘要 |
A semiconductor memory device with NAND cell units arranged therein, the NAND cell unit including: a plurality of electrically rewritable and non-volatile memory cells connected in series; first and second select gate transistors disposed at the both ends of the NAND cell unit for coupling it to a bit line and a source line, respectively; and dummy cells disposed adjacent to the first and second select gate transistors in the NAND cell unit, wherein the dummy cells are set at a state with a threshold voltage higher than that of an erase state of the memory cell. |
申请公布号 |
US8194461(B2) |
申请公布日期 |
2012.06.05 |
申请号 |
US20110985427 |
申请日期 |
2011.01.06 |
申请人 |
KOSAKI YASUKAZU;SHIBATA NOBORU;KABUSHIKI KAISHA TOSHIBA |
发明人 |
KOSAKI YASUKAZU;SHIBATA NOBORU |
分类号 |
G11C16/10 |
主分类号 |
G11C16/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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