发明名称 TRANSACTION CONTROL DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a transaction control device that can decrease the number of memories and reduce the chip area of a semiconductor device. <P>SOLUTION: A transaction-queue-by-initiator management part 102 queues a transaction determined by an acceptance control part 101 to be queueable, and makes a request to write data by managing a transaction queue so that data of the transaction is written to a large scale memory until an allowable wait time corresponding to the transaction ends. A priority level control part 103 writes the data of transaction determined by the acceptance control part 101 to be unqueueable and data of a transaction requested by the transaction-queue-by-initiator management part 102 to write to the large scale memory according to priority levels. Therefore, the number of memories can be decreased and the chip area of the semiconductor device can be reduced. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012103892(A) 申请公布日期 2012.05.31
申请号 JP20100251688 申请日期 2010.11.10
申请人 RENESAS ELECTRONICS CORP 发明人 KOYAMA MASAYUKI
分类号 G06F12/00 主分类号 G06F12/00
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