| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device including a test circuit capable of generating a test signal without malfunction. <P>SOLUTION: A semiconductor device comprises a command decoder 106 that activates a prescribed signal out of first test signals (test signals DFT1 to DFTn) in accordance with a command signal CMD1 and a command signal CMD2 when an operation specifying command corresponds to setting of a test operation mode; a register part 107 that receives the first test signals and outputs the received signals as second test signals (control test signals DFTF1 to DFTFn) in parallel when the operation specifying command corresponds to setting of the test operation mode and is connected through scan chain connection for outputting the first test signals as third test signals in series to a scan output terminal TSOUT when the operation specifying command specifies an operation other than setting of the test operation mode; and a reading/writing control part 104 that controls an operation of a memory cell array in accordance with the second test signals when the operation specifying command corresponds to setting of the test operation mode. <P>COPYRIGHT: (C)2012,JPO&INPIT |
