发明名称 PROCESSOR, ELECTRONIC CONTROL DEVICE, CREATION PROGRAM
摘要 <p>A processor has a plurality of cores each executing a program, wherein the processor has a first self core execution point acquisition means which, when a first core has executed an execution history logged command described at an execution history logged point for a program, acquires first code block information indicating at one address a series of commands for the first core; a first other core execution point acquisition means which, when the first core has executed the execution history logged command, acquires a first execution address information for a command being executed by a second core; and a first execution point information logging means which associates and stores in chronological order in a shared memory the first code block information and the first execution address information.</p>
申请公布号 WO2012070137(A1) 申请公布日期 2012.05.31
申请号 WO2010JP71049 申请日期 2010.11.25
申请人 TOYOTA JIDOSHA KABUSHIKI KAISHA;HONTANI, KENJI 发明人 HONTANI, KENJI
分类号 G06F11/28 主分类号 G06F11/28
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