发明名称 FREQUENCY MULTIPLIER
摘要 A frequency multiplier includes an input circuit, an output circuit, and a resonance circuit. The input circuit is coupled to an input node and a middle node. The middle node provides a middle signal that has a signal component having the same frequency as an input signal that is provided to the input node. The middle signal further has an even number“n”multiple of the input signal frequency. The output circuit has a predetermined input impedance for the middle node. The resonance circuit includes an inductor that is coupled in series with a capacitor, where the capacitor is in a parallel connection to the middle node. The resonance circuit has a resonance frequency that is equal to a frequency of the input signal, and such resonance circuit also has an output impedance that matches with the predetermined input impedance of the output circuit.
申请公布号 US2012133400(A1) 申请公布日期 2012.05.31
申请号 US201113305829 申请日期 2011.11.29
申请人 YOSHIMASU TOSHIHIKO;SHIBATA TAKAYUKI;DENSO CORPORATION;WASEDA UNIVERSITY 发明人 YOSHIMASU TOSHIHIKO;SHIBATA TAKAYUKI
分类号 H03B19/03 主分类号 H03B19/03
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