发明名称 SEMICONDUCTOR MEMORY AND MEMORY SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To reduce leak current due to a short circuit of a word line and a bit line while preventing malfunction of a sense amplifier at access operation time by keeping a voltage level of the bit line at the voltage level of a precharge line, even when a floating period of the bit line becomes long. <P>SOLUTION: A semiconductor memory comprises; a memory block having multiple memory cells and a word line and a bit line connected to the memory cells; a precharge switch for connecting the bit line to a precharge line; a sense amplifier shared with the memory block; a timer periodically outputting an oscillation signal; and a switch control circuit temporarily turning on the precharge switch in response to an access operation and temporarily turning on the precharge switch in response to the oscillation signal while the access operation is not performed. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012104220(A) 申请公布日期 2012.05.31
申请号 JP20120011992 申请日期 2012.01.24
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 KOBAYASHI HIROYUKI
分类号 G11C11/4094;G11C11/401 主分类号 G11C11/4094
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