| 摘要 |
<P>PROBLEM TO BE SOLVED: To shorten a test time. <P>SOLUTION: A testing apparatus for testing a memory under test comprises: a logic comparator for comparing output data that is output from the memory under test with an expected value data for each address of the memory under test and outputting fail data if the output data and the expected value data does not match; a failure analysis memory part for storing the fail data in association with the address of the memory under test; and a mask part for counting the fail data that is output from the logic comparator and, if the count value exceeds a predetermined upper-limit fail value, masking the fail data that is supplied from the logic comparator to the failure analysis memory part. <P>COPYRIGHT: (C)2012,JPO&INPIT |
