| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a monitoring system of a sampling frequency, capable of eliminating the necessity of a reference oscillator of generating a sampling frequency and further reducing the load on a CPU. <P>SOLUTION: A main detection CPU 1 and a fault detection CPU 2 each execute frequency division from a clock owned by each of them and generate a sampling clock. The main detection CPU increments a counter ensuring a region in a shared memory 3 by 1 per a predetermined time using a sampling frequency. The fault detection CPU reads a value of the counter per predetermined time, and checks whether or not the sampling frequency is within a tolerance range. <P>COPYRIGHT: (C)2009,JPO&INPIT |
