发明名称 |
Cache control apparatus, information processing apparatus, and cache control method |
摘要 |
A cache control apparatus determines whether to adopt or not data acquired by a speculative fetch by monitoring a status of the speculative fetch which is a memory fetch request output before it becomes clear whether data requested by a CPU is stored in a cache of the CPU and time period obtained by adding up the time period from when the speculative fetch is output to when the speculative fetch reaches a memory controller and time period from completion of writing of data to a memory which is specified by a data write command that has been issued, before issuance of the speculative fetch, for the same address as that for which the speculative fetch is issued to when a response of the data write command is returned. |
申请公布号 |
US8190821(B2) |
申请公布日期 |
2012.05.29 |
申请号 |
US20080250728 |
申请日期 |
2008.10.14 |
申请人 |
IWASAKI SHINICHI;FUJITSU LIMITED |
发明人 |
IWASAKI SHINICHI |
分类号 |
G06F12/00;G06F13/00 |
主分类号 |
G06F12/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|