发明名称 Methods of forming multi-level cell of semiconductor memory
摘要 Provided is a method of forming a semiconductor memory cell in which in order to store two bits or more data in a memory cell, three or more bottom electrode contacts (BECs) and phase-change materials (GST) have a parallel structure on a single contact plug (CP) and set resistances are changed depending on thicknesses (S), lengths (L) or resistivities (&rgr;) of the three or more bottom electrode contacts, so that a reset resistance and three different set resistances enable data other than in set and reset states to be stored. Also, a method of forming a memory cell in which three or more phase-change materials (GST) have a parallel structure on a single bottom electrode contact, and the phase-change materials have different set resistances depending on composition ratio or type, so that four or more different resistances can be implemented is provided.
申请公布号 US8187918(B2) 申请公布日期 2012.05.29
申请号 US20090587772 申请日期 2009.10.13
申请人 OH GYU-HWAN;AN HYEUNG-GEUN;PARK SOON-OH;AHN DONG-HO;PARK YOUNG-LIM;SAMSUNG ELECTRONICS CO., LTD. 发明人 OH GYU-HWAN;AN HYEUNG-GEUN;PARK SOON-OH;AHN DONG-HO;PARK YOUNG-LIM
分类号 H01L21/06 主分类号 H01L21/06
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