APPARATUS FOR MULTIPLY ADD FUSED UNIT OF FLOATING POINT NUMBER, AND METHOD THEREOF
摘要
PURPOSE: A complex calculation apparatus with floating point numbers and a calculation method thereof are provided to minimize power consumption by omitting unnecessary calculations. CONSTITUTION: A partial product generator(110) calculates a partial product by dividing the mantissa of first and second floating point values in n-bit unit and adds the partial products to output single partial product sum and carry. A carry storage adder(120) creates first bit partial product sum and carry by adding the partial product sum and carry with the lowermost bit of the mantissa of a third floating point value. A carry select adder(130) creates mantissa presented in a second bit by adding the first bit partial product sum and carry with the uppermost bit of the mantissa of the third floating point value.
申请公布号
KR20120053343(A)
申请公布日期
2012.05.25
申请号
KR20100114564
申请日期
2010.11.17
申请人
SAMSUNG ELECTRONICS CO., LTD.;INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
发明人
YU, HYEONG SEOK;SUH, DONG KWAN;KIM, SUK JIN;LEE, YONG SURK;KIM, SAN