发明名称 METHODS FOR FORMING BURIED METAL LINE AND BUREID GATE OF TRANSISTOR
摘要 PURPOSE: A method for forming a buried metal line and a buried gate of a transistor is provided to reduce a resistance of a buried gate or buried metal line pattern by removing impurities included in a gate or metal line pattern to fill a trench. CONSTITUTION: An insulation pad(210) is formed on a semiconductor substrate to form a device isolation trench(101). A trench(110) is formed in a semiconductor substrate of an active area set by a device isolation layer(130). A gate dielectric layer(310) is formed on the sidewall and bottom of the trench. A first metal layer(330) is formed on the gate dielectric layer. A first metal layer is thermally processed.
申请公布号 KR20120052793(A) 申请公布日期 2012.05.24
申请号 KR20100114103 申请日期 2010.11.16
申请人 SK HYNIX INC. 发明人 KIM, JUN KI
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
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