发明名称 SEMICONDUCTOR DEVICE HAVING PLURAL WIRING LAYERS
摘要 A semiconductor device includes a lower wiring layer, having signal lines and power supply lines extending in a Y-direction; an upper wiring layer having signal lines and power supply lines extending in an X-direction; via conductors provided in first overlap regions where corresponding signal lines overlap each other; and via conductors provided in second overlap regions where corresponding power supply lines overlap each other. The width in the X-direction of the first regions is wider than the widths in the X-direction of the second regions. Therefore, in the first regions, a plurality of via conductors can be provided. Moreover, the power supply lines are divided in the Y-direction to avoid interference with the first regions. On a plurality of lower-layer lines, two vias are placed at a minimum pitch containing one via.
申请公布号 US2012126422(A1) 申请公布日期 2012.05.24
申请号 US201113298995 申请日期 2011.11.17
申请人 ENDO KIYOTAKA;ISHIZUKA KAZUTERU;FUJISAWA HIROKI;ELPIDA MEMORY, INC. 发明人 ENDO KIYOTAKA;ISHIZUKA KAZUTERU;FUJISAWA HIROKI
分类号 H01L23/48 主分类号 H01L23/48
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