发明名称 |
SEMICONDUCTOR DEFECT CLASSIFYING METHOD, SEMICONDUCTOR DEFECT CLASSIFYING APPARATUS, AND SEMICONDUCTOR DEFECT CLASSIFYING PROGRAM |
摘要 |
A defect is efficiently and effectively classified by accurately determining the state of overlap between a design layout pattern and the defect. This leads to simple identification of a systematic defect. A defective image obtained through defect inspection or review of a semiconductor device is automatically pattern-matched with design layout data. A defect is superimposed on a design layout pattern for at least one layer of a target layer, a layer immediately above the target layer, and a layer immediately below the target layer. The state of overlap of the defect is determined as within the pattern, over the pattern, or outside the pattern, and the defect is automatically classified. |
申请公布号 |
US2012131529(A1) |
申请公布日期 |
2012.05.24 |
申请号 |
US201013382437 |
申请日期 |
2010.05.14 |
申请人 |
HAYAKAWA KOICHI;HIRAI TAKEHIRO;TANDAI YUTAKA;ISHIKAWA TAMAO;SAKAI TSUNEHIRO;HASUMI KAZUHISA;NEMOTO KAZUNORI;ICHINOSE KATSUHIKO;TAKAGI YUJI;HITACHI HIGH-TECHNOLOGIES CORPORATION |
发明人 |
HAYAKAWA KOICHI;HIRAI TAKEHIRO;TANDAI YUTAKA;ISHIKAWA TAMAO;SAKAI TSUNEHIRO;HASUMI KAZUHISA;NEMOTO KAZUNORI;ICHINOSE KATSUHIKO;TAKAGI YUJI |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|