发明名称 INTEGRATED CIRCUIT DEVICE AND METHOD FOR PREPARING THE SAME
摘要 An integrated circuit device includes a bottom wafer, at least one stacking wafer positioned on the bottom wafer, and at least one conductive via penetrating through the stacking wafer and into the bottom wafer in a substantially linear manner, wherein the bottom wafer and the stacking wafer are bonded by an intervening adhesive layer, and no bump pad is positioned between the bottom wafer and the stacking wafer. A method for preparing an integrated circuit device includes the steps of forming a bottom wafer, forming at least one stacking wafer, bonding the at least one stacking wafer to the bottom wafer by an intervening adhesive layer, and forming at least one conductive via penetrating through the stacking wafer and into the bottom wafer in a substantially linear manner, wherein no bump pad is positioned between the bottom wafer and the stacking wafer.
申请公布号 US2012126394(A1) 申请公布日期 2012.05.24
申请号 US20100949058 申请日期 2010.11.18
申请人 HUANG TSAI YU;NANYA TECHNOLOGY CORPORATION 发明人 HUANG TSAI YU
分类号 H01L23/48;H01L21/30 主分类号 H01L23/48
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