发明名称 |
Structure and process of basic complementary logic gate made by junctionless transistors |
摘要 |
The present invention discloses a structure and process of basic complementary logic gate made by junctionless transistors. Junctionless N-channel transistor(s) and junctionless P-channel transistor(s) are formed on a semiconductor wafer, a conducting contact structure is used to connect the transistors to form a basic complementary logic gate(s) such as inverter, NAND, NOR, etc. |
申请公布号 |
US2012126197(A1) |
申请公布日期 |
2012.05.24 |
申请号 |
US201113064168 |
申请日期 |
2011.03.09 |
申请人 |
CHUNG STEVE S.;HSIEH E. R.;NATIONAL CHIAO TUNG UNIVERSITY |
发明人 |
CHUNG STEVE S.;HSIEH E. R. |
分类号 |
H01L27/092;H01L21/782;H01L21/8238 |
主分类号 |
H01L27/092 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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