| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve reliability of a memory. <P>SOLUTION: A semiconductor memory comprises: a sense amplifier circuit 4 which includes a plurality of sense units SU which hold respective verification results in relation to a memory cell transistor and are commonly connected to a signal line COM for every column block COL; and a detection circuit 5 which includes a detection unit FU including: a latch circuit 70 holding failure information on a memory cell array 1; and a latch circuit 50 including a terminal connected to the signal line COM, a terminal connected to the latch circuit 70 and an output terminal connected to a signal line NCOM. The second latch circuit 50 outputs an operation result of a signal of the signal line COM and the failure information to the signal line NCOM. <P>COPYRIGHT: (C)2012,JPO&INPIT |
