发明名称 VOLTAGE BOOSTING/LOWERING CIRCUIT AND VOLTAGE BOOSTING/LOWERING CIRCUIT CONTROL METHOD
摘要 A voltage boosting/lowering circuit according to an aspect of the present invention includes an output voltage generation circuit 15 that includes a switch element 2 connected between an input terminal 1 and a choke coil 3 and a switch element 7 connected between the choke coil 3 and a ground, and generates an output voltage by switching the switch elements 2 and 7 between an on-state and an off-state and thereby boosting/lowering an input voltage input to the input terminal 1, a first switch control unit that outputs a first pulse signal to the switch element 2, a duty detection circuit 32 that detects a duty of the first pulse signal, and a second switch control unit that outputs a second pulse signal to the switch element 7 according to the detected duty.
申请公布号 US2012126769(A1) 申请公布日期 2012.05.24
申请号 US201113298920 申请日期 2011.11.17
申请人 UCHIIKE TAKESHI;RENESAS ELECTRONICS CORPORATION 发明人 UCHIIKE TAKESHI
分类号 G05F1/618 主分类号 G05F1/618
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