发明名称 |
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES |
摘要 |
PURPOSE: A semiconductor package and a semiconductor device packaging method are provided to reduce mechanical stress due to a difference of thermal coefficients of a die and a mold compound within the package by providing a step between a cap surface and an active surface of the die. CONSTITUTION: A substrate comprises a first major surface(111) and a second major surface(112). The first major surface comprises a first region(111a) and a second region(111b). A die(150) is installed on the first region. The die comprises a first surface(150a) and a second major surface(150b). A conductive trace(140) is arranged on a second surface of a first insulation substrate layer(113). The conductive trace comprises a conductive pad(168). |
申请公布号 |
KR20120052171(A) |
申请公布日期 |
2012.05.23 |
申请号 |
KR20110118095 |
申请日期 |
2011.11.14 |
申请人 |
UNITED TEST AND ASSEMBLY CENTER LTD. |
发明人 |
NG BEE LIANG CATHERINE;LE SAE KRIANGSAK;WANG KHIANG CHUEN;SUTHIWONGSUNTHORN NATHAPONG |
分类号 |
H01L23/12;H01L21/60;H01L23/48 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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