发明名称 |
Semiconductor device and manufacturing method with improved epitaxial quality of III-V compound on silicon surfaces |
摘要 |
Stacking faults are reduced or eliminated by epitaxially growing a III-V compound semiconductor region in a trench followed by capping and annealing the region. The capping layer limits the escape of atoms from the region and enables the reduction or elimination of stacking faults along with the annealing. |
申请公布号 |
US8183134(B2) |
申请公布日期 |
2012.05.22 |
申请号 |
US201113009151 |
申请日期 |
2011.01.19 |
申请人 |
WU CHENG-HSIEN;KO CHIH-HSIN;WANN CLEMENT HSINGJEN;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
WU CHENG-HSIEN;KO CHIH-HSIN;WANN CLEMENT HSINGJEN |
分类号 |
H01L21/20;H01L21/36 |
主分类号 |
H01L21/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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