| 摘要 |
A semiconductor memory includes: a plurality of active regions AAi, AAi−1, . . . , AAn, which extend on a memory cell array along the column length; a plurality of non-uniformly arranged word line patterns WL1, WL2, . . . , extending along the row length; a plurality of select gate line patterns SG1, SG2, . . . , arranged parallel to the plurality of word line patterns; borderless contacts formed near the ends of the word line patterns on the memory cell array, in contact with part of an interconnect extended from the end of the memory cell array, but not in contact with interconnects adjacent to that interconnect; and bit line contacts formed within contact forming regions provided by removing part of the plurality of word line patterns and select gate line patterns through double exposure. |
