发明名称 METAL LAYER FORMATION METHOD FOR DIODE CHIPS/WAFERS
摘要 An electroless plated metal layer formation method for forming a metal layer on a diode chip/wafer for wire bonding is disclosed to include the step of forming a metal base material on a diode chip/wafer adapted for inducing a reduction system to cause a catalytic reaction at location(s) where the desired metal layer is to be formed, and the step of employing an electroless plating process to form a metal layer on the diode chip/wafer that surrounds the metal base material. An isolation layer may be formed on the metal base layer and opening(s) may be formed on the isolation layer before deposition of the metal layer.
申请公布号 US2012122311(A1) 申请公布日期 2012.05.17
申请号 US201213359147 申请日期 2012.01.26
申请人 CHEN CHUN-PIN 发明人 CHEN CHUN-PIN
分类号 H01L21/285;H01L21/288 主分类号 H01L21/285
代理机构 代理人
主权项
地址