发明名称 |
System and Methods for Silencing Hardware Backdoors |
摘要 |
Methods for preventing activation of hardware backdoors installed in a digital circuit, the digital circuit comprising one or more hardware units to be protected. A timer is repeatedly initiated for a period less than a validation epoch, and the hardware units are reset upon expiration of the timer to prevent activation of a time-based backdoor. Data being sent to the hardware unit is encrypted in an encryption element to render it unrecognizable to a single-shot cheat code hardware backdoor present in the hardware unit. The instructions being sent to the hardware unit are reordered randomly or pseudo-randomly, with determined sequential restraints, using an reordering element, to render an activation instruction sequence embedded in the instructions unrecognizable to a sequence cheat code hardware backdoor present in the hardware unit. |
申请公布号 |
US2012124393(A1) |
申请公布日期 |
2012.05.17 |
申请号 |
US201113273016 |
申请日期 |
2011.10.13 |
申请人 |
SETHUMADHAVAN LAKSHMINARASIMHAN;WAKSMAN ADAM;THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK |
发明人 |
SETHUMADHAVAN LAKSHMINARASIMHAN;WAKSMAN ADAM |
分类号 |
G06F21/02;G06F1/24;G06F1/26 |
主分类号 |
G06F21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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