| 摘要 |
<P>PROBLEM TO BE SOLVED: To enable a plurality of devices to simultaneously transfer data and, even when any fault occurs in a specific device, to enable any other device to transfer data. <P>SOLUTION: A bus arbitration circuit 1 includes a plurality of queuing buffers 12a-12c composed of a plurality of regions for storing data in predetermined regions, a plurality of reception control sections 11a-11c each of which receives data transmitted from devices 3a-3c and controls write of reception data into the queuing buffers 12a-12c, a coherency buffer 13 which is composed of a plurality of regions and stores information indicating the queuing buffers 12a-12c storing the reception data from the devices 3a-3c in a predetermined region in accordance with a reception order of data by the plurality of reception control sections, and a transmission control section 14 which reads data from the queuing buffers 12a-12c as shown in the reception order of data on the basis of the information stored in the coherency buffer 13 and transmits the read data to a bus 2. <P>COPYRIGHT: (C)2012,JPO&INPIT |
