SEMICONDUCTOR CHIP PACKAGE AND SEMICONDUCTOR MODULE INCLUDING THE SAME

摘要

PURPOSE: A semiconductor chip package and a semiconductor module including the same are provided to reduce wire length by forming penetration silicon vias to pass through an upper side and a side of a laminated semiconductor chip. CONSTITUTION: A first semiconductor chip(110) includes a first substrate(130) and a first penetration silicon via(120). The first penetration silicon via is formed passing through a first side and a second side of the first substrate. A second semiconductor chip(150) includes a second substrate(170) and a second penetration silicon via(160). The second penetration silicon via is formed passing through a third side and a fourth side of the second substrate. A side bump(190) electrically connects the first penetration silicon via and the second penetration silicon via.