| 摘要 |
Disclosed is a PLL frequency synthesizer the phase noise characteristics of which are improved. To achieve this, in an ADPLL frequency synthesizer (100), a frequency characteristic adjusting unit (180) compares a predetermined threshold to the difference between the fractional portion of a DCO control signal and the closest integer value, and generates an adjustment signal based on the comparison result, and a supplementary varactor (115) shifts the oscillating frequency characteristics based on the adjustment signal received from the frequency characteristic adjusting unit (180). By setting the predetermined threshold to a value defining the range in which the possibility of incrementing or decrementing is high, the oscillating frequency characteristics can be shifted in cases when the target value of the fractional portion of the DCO control signal is in the range in which the possibility of incrementing or decrementing is high. By shifting the oscillating frequency characteristics, the target value of the fractional portion of the DCO control signal can be shifted to a range in which the possibility of incrementing or decrementing is low, so the phase noise characteristics of the synthesizer can be improved. |
