发明名称 METHOD AND SYSTEM FOR PROVIDING EFFICIENT ON-PRODUCT CLOCK GENERATION FOR DOMAINS COMPATIBLE WITH COMPRESSION
摘要 A method and system for providing on-product clocks for domains compatible with compression is disclosed. According to one embodiment, a base signal received from automated test equipment has a frequency for testing a plurality of clock domains and programming instruction for first and second clock domains of a plurality of clock domains. First and second clock signals are generated from the base clock signal based on the programming instruction. A first delay for the first clock signal and a second delay for the second clock signal are determined from the programming instruction. A test sequence is provided to test a first clock domain and a second clock domain. The test sequence comprises the first clock signal delayed by the first delay and the second clock signal delayed by the second delay. The first clock drives the first clock domain and the second clock derives the second clock domain.
申请公布号 US2012124423(A1) 申请公布日期 2012.05.17
申请号 US20100946995 申请日期 2010.11.16
申请人 CHAKRAVADHANULA KRISHNA;KELLER BRION;MALNEEDI RAMANA;CADENCE DESIGN SYSTEMS INC. 发明人 CHAKRAVADHANULA KRISHNA;KELLER BRION;MALNEEDI RAMANA
分类号 G06F11/273 主分类号 G06F11/273
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