发明名称 |
ARITHMETIC DEVICE FOR CONCURRENTLY PROCESSING A PLURALITY OF THREADS |
摘要 |
A processor is provided that is capable of concurrently processing a sequence of instructions for a plurality of threads achieving the retry success rate equivalent to the success rate in processors that process a sequence of instructions for a single thread. An arithmetic device 200 is provided with an instruction execution circuit 201 for executing a plurality of threads, or an execution control circuit 202 for controlling the execution state or rerunning of the threads. |
申请公布号 |
EP2169553(B1) |
申请公布日期 |
2012.05.16 |
申请号 |
EP20070790187 |
申请日期 |
2007.06.20 |
申请人 |
FUJITSU LIMITED |
发明人 |
GOMYO, NORIHITO;SUNAYAMA, RYUICHI |
分类号 |
G06F11/14 |
主分类号 |
G06F11/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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