| 摘要 |
The invention provides a method of manufacturing a semiconductor device having a MOS transistor, a resistor element, etc on one semiconductor substrate, in which the number of masks and the number of manufacturing steps are decreased. In an NMOS formation region (10A), a channel stopper layer (14A) is formed in a P type well (11A) by a first ion implantation process. Then a punch-through prevention layer (13A) is formed in the P type well (11A) by a second ion implantation process. On the other hand, in a first high resistor element formation region (10C) and a second high resistor element formation region (10D), utilizing the first and second ion implantation processes, a resistor layer (15C, 15D) is formed in an N type well (11C, 11D).
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