发明名称 A METHOD FOR FORMING A SEMICONDUCTOR ARRANGEMENT WITH GATE SIDEWALL SPACERS OF SPECIFIC DIMENSIONS
摘要 A method for forming spacers of specific dimensions on a polysilicon gate electrode protects the sidewalls of the polysilicon gate electrode during selective epitaxial growth. The spacers, whether asymmetric or symmetric, are precisely defined by using the same specific exposure tool, such as a 193 nm wavelength step and scan exposure tool, and the same pattern reticle, in both the defining of the polysilicon gate electrode pattern and the pattern spacer, while employing tight alignment specifications.
申请公布号 KR101142992(B1) 申请公布日期 2012.05.15
申请号 KR20077012157 申请日期 2005.11.29
申请人 发明人
分类号 H01L21/28;G03F9/00;H01L21/027;H01L21/336 主分类号 H01L21/28
代理机构 代理人
主权项
地址