Method for forming three-dimensional capacitor of dynamic RAM memory cell and two-dimensional capacitor, within integrated circuit of semiconductor chip, involves forming lower electrode of additional capacitor in metal layer

摘要

The method involves realizing a trench in an insulating region of an integrated circuit (CI). An upper electrode (ASUP) of a capacitor (CDA) of a dynamic RAM memory cell is realized. A metal layer (EAB) is formed on a dielectric material and the insulating region. A lower electrode (BINF) of an additional capacitor (CDB1) is formed in the metal layer, where the formation of the lower electrode of the additional capacitor in the metal layer is same as that of a portion of the upper electrode of the capacitor of the memory cell. An independent claim is also included for an integrated circuit including a capacitor of a dynamic RAM memory cell.