发明名称 |
METHOD OF FABRICATING GATE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME |
摘要 |
A method of fabricating a gate includes sequentially forming an insulation layer and a conductive layer on substantially an entire surface of a substrate. The substrate has a device isolation layer therein and a top surface of the device isolation layer is higher than a top surface of the substrate. The method includes planarizing a top surface of the conductive layer and forming a gate electrode by patterning the insulation layer and the conductive layer.
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申请公布号 |
US2012115298(A1) |
申请公布日期 |
2012.05.10 |
申请号 |
US201113238330 |
申请日期 |
2011.09.21 |
申请人 |
KIM JONG-PIL;JANG YOUNG-GOAN;KIM DONG-WON;CHO HAG-JU |
发明人 |
KIM JONG-PIL;JANG YOUNG-GOAN;KIM DONG-WON;CHO HAG-JU |
分类号 |
H01L21/28;H01L21/336 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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