| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a memory control apparatus to improve performance by performing read/write operation on a multi-channel basis in suitable timing. <P>SOLUTION: In a memory control apparatus, a queue for each channel holds a write instruction of data to a storage medium. When first control means receives a read instruction of data to the storage medium in a period until enabling an operation of the write instruction after holding the write instruction in the queue of a plurality of channels and synchronizing the plurality of channels, the first control means prioritizes a read operation of data according to the read instruction over the write instruction and, when the write instruction is enabled to be processed on the plurality of channels, the first control means performs write operation of data according to the write instruction after synchronizing the plurality of channels. When performing an operation according to the write instruction, on the basis of data written on the plurality of channels, generation means generates an error-correction code for detecting and correcting errors in the data written on the plurality of channels. Second control means performs an operation for writing the error-correction code onto the storage medium. <P>COPYRIGHT: (C)2012,JPO&INPIT |
