发明名称 REFERENCE VOLTAGE GENERATION CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To generate a reference voltage which reduces power consumption, without using any large resistor. <P>SOLUTION: When a drain current of a P-channel transistor M3 is defined as I1 and a drain current of a P-channel transistor M4 is defined as I2, a relationship between a voltage VD1 which is generated in a junction D1 and a voltage VD2 which is generated in a junction D2 becomes VD1-VD2=(k&times;T/q)&times;In(10&times;I1/I2), thereby obtaining a voltage in proportion to an absolute temperature T. By loading negative feedback with N-channel transistor differential couples M6 and M7 and differential amplifiers which are active loads M1 and M2 of the P-channel transistors, a gate/back-gate voltage of a P-channel transistor M10 becomes equal with VD1-VD2. When currents of P-channel transistors M4 and M5 are set equal, gate/back-gate voltages of P-channel transistors M11-M20 become equal to that of the P-channel transistor M10, and Vout becomes a reference voltage of which the temperature coefficient is approximately zero. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012088978(A) 申请公布日期 2012.05.10
申请号 JP20100235993 申请日期 2010.10.20
申请人 SUGAWARA MITSUTOSHI 发明人 SUGAWARA MITSUTOSHI
分类号 G05F3/24 主分类号 G05F3/24
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