发明名称 TESTING WAFER, TESTING SYSTEM AND SEMICONDUCTOR WAFER
摘要 Provided is a test wafer that tests a plurality of semiconductor chips that are formed on a semiconductor wafer and that each include an operation circuit and an internal memory. The test wafer comprises a plurality of test circuits that correspond to the plurality of semiconductor chips, supply the operation circuits of the corresponding semiconductor chips with measurement signals, and measure electrical characteristics of signals output by the operation circuits in response to the measurement signals; and a plurality of write circuits that correspond to the plurality of semiconductor chips and each write, to the internal memory of the corresponding semiconductor chip, data corresponding to a measurement result of the corresponding test circuit.
申请公布号 KR101138201(B1) 申请公布日期 2012.05.10
申请号 KR20107026136 申请日期 2008.06.02
申请人 发明人
分类号 G01R31/28;H01L21/66 主分类号 G01R31/28
代理机构 代理人
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