发明名称 COUNTER CIRCUIT AND SOLID STATE IMAGING DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To reduce the current consumption of a counter circuit while keeping the speed of counter operation intact. <P>SOLUTION: In each counter circuit CU, starts and stops of counting actions on S clocks CK<SB POS="POST">1</SB>-CK<SB POS="POST">s</SB>are sequentially propagated, so that in the process of the counting action on the clock CK<SB POS="POST">n</SB>, the counting actions on the clocks CK<SB POS="POST">1</SB>-CK<SB POS="POST">n-1</SB>, CK<SB POS="POST">n+1</SB>-CK<SB POS="POST">s</SB>are stopped. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012089912(A) 申请公布日期 2012.05.10
申请号 JP20100232346 申请日期 2010.10.15
申请人 TOSHIBA CORP 发明人 HITSU KAZUKI
分类号 H03K21/02;H01L27/146;H04N5/378 主分类号 H03K21/02
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