| 摘要 |
A thin film transistor array panel according to an exemplary embodiment of the present invention floats all data lines during a manufacturing process by forming the data lines DL separate from each other and separate from the data pad connecting lines DLL, and only connecting the lines DL to the corresponding lines DLL after the data lines DL are etched. This reduces etching speed differences between data wires, thereby reducing the problem of differing thicknesses for different data lines DL. Therefore, it is possible to prevent performance deterioration or display quality deterioration of the transistor due to a thickness difference of data wires.
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