发明名称 RECEIVING CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a receiving circuit that can implement an adaptive equalization process with a small circuit area and at a low power consumption by dispensing with a large bit width digital operation. <P>SOLUTION: The receiving circuit includes: an equalization circuit for applying an equalization process depending on an equalization coefficient to a received signal to output an equalized signal; an error calculation circuit for computing a first signal having signal values of 0 and 1 depending on magnitude relationships between the equalized signal and a first threshold, computing a second signal having signal values of 0 and 1 depending on magnitude relationships between the equalized signal and a second threshold, and calculating a difference between the frequency of occurrence of a predetermined pattern of 0 and 1 occurring in the first signal and the frequency of occurrence of the predetermined pattern of 0 and 1 occurring in the second signal; and an adaptive equalization control circuit for adjusting the equalization coefficient in accordance with the difference. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012089950(A) 申请公布日期 2012.05.10
申请号 JP20100233051 申请日期 2010.10.15
申请人 FUJITSU LTD 发明人 KIBUNE MASAYA;TAMURA YASUTAKA
分类号 H04B3/06;H04L25/03 主分类号 H04B3/06
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