发明名称 |
Method of fabricating a gate stack integration of complementary MOS device |
摘要 |
A method of forming an integrated circuit structure includes providing a substrate comprising a first device region and a second device region; forming an oxide cap over the substrate and in the first device region and the second device region; forming a first metal layer over the oxide cap, wherein the first metal layer has a first portion in the first device region and a second portion in the second device region; forming a mask to cover the second portion of the first metal layer, wherein the first portion of the first metal layer is exposed; removing the first portion of the first metal layer and the oxide cap from the first device region; removing the mask; and forming a second metal layer in the first device region and the second device region, wherein the second metal layer in the second device region is over the second portion of the first metal layer. |
申请公布号 |
US8173499(B2) |
申请公布日期 |
2012.05.08 |
申请号 |
US20100750413 |
申请日期 |
2010.03.30 |
申请人 |
CHUNG SHU-WEI;YU KUO-FENG;LIN SHYUE-SHYH;TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
CHUNG SHU-WEI;YU KUO-FENG;LIN SHYUE-SHYH |
分类号 |
H01L21/8238;H01L29/788 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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