发明名称 DIFFERENT GATE OXIDES THICKNESSES FOR DIFFERENT TRANSISTORS IN AN INTEGRATED CIRCUIT
摘要 An integrated circuit and gate oxide forming process are disclosed which provide a gate structure that is simple to integrate with conventional fabrication processes while providing different gate oxide thicknesses for different transistors within the integrated circuit. For a flash memory, which may utilize the invention, the different gate oxide thicknesses may be used for lower voltage transistors, memory array transistors, and higher voltage transistors.
申请公布号 US2012108051(A1) 申请公布日期 2012.05.03
申请号 US201213344329 申请日期 2012.01.05
申请人 ZHOU XIANFENG 发明人 ZHOU XIANFENG
分类号 H01L21/28 主分类号 H01L21/28
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